Mail Index

• Thread Index

• [pci] Marketing of bonded leather/fuir jackets
  • From: webmaster@cerrison.com
• Re: Re: [pci] question on PCI master
  • From: sumnow <sumnow@263.net>
• Re: [pci] question on PCI master
  • From: wilton@mail.usa.com
• Re: [pci] question on PCI master
  • From: sumnow <sumnow@263.net>
• [pci] question on PCI master
  • From: wilton@mail.usa.com
• Re: Re: [pci] about turnaround
  • From: Johan Klockars <rand@cd.chalmers.se>
• Re: Re: [pci] about turnaround
  • From: sumnow <sumnow@263.net>
• Re: [pci] a simple PCI target module
  • From: ezhcai@ntu.edu.sg
• [pci] PCI taget
  • From: "Chandrashekar" <chandrashekar@rassit.com>
• Re: [pci] about turnaround
  • From: Tadej Markovic <tadej@opencores.org>
• Re: [pci] a simple PCI target module
  • From: Tadej Markovic <tadej@opencores.org>
• [pci] about turnaround
  • From: sumnow <sumnow@263.net>
• Re: [pci] why read is slower than write ?
  • From: ezhcai@ntu.edu.sg
• Re: [pci] why read is slower than write ?
  • From: Madhusudhan Rao <madhu_sudhana_rao@yahoo.com>
• [pci] problems on PCI master
  • From: wilton@mail.usa.com
• Re: [pci] a simple PCI target module
  • From: Tadej Markovic <tadej@opencores.org>
• Re: [pci] a simple PCI target module
  • From: ezhcai@ntu.edu.sg
• Re: [pci] why read is slower than write ?
  • From: "Miha Dolenc" <mihad@opencores.org>
• [pci] why read is slower than write ?
  • From: Madhusudhan Rao <madhu_sudhana_rao@yahoo.com>
• Re: [pci] a simple PCI target module
  • From: sumnow <sumnow@263.net>
• [pci] a simple PCI target module
  • From: ezhcai@ntu.edu.sg
• RE: [pci] PCI-startup
  • From: "Gvozden Marinkovic" <gvozden@saga.co.yu>
• [pci] PCI-startup
  • From: "Jerzy Gbur" <furia1024@wp.pl>
• Re: [pci] RE: [pci] Problems compiling PCI core and test bench for Modelsim
  • From: "Miha Dolenc" <mihad@opencores.org>
• [pci] question regarding PCI 21153 Intel Bridge
  • From: withluvbalu@rediffmail.com
• Re: [pci] Bus command
  • From: Madhusudhan Rao <madhu_sudhana_rao@yahoo.com>
• [pci] Bus command
  • From: wilton@mail.usa.com
• Re: [pci] Fifo instantiation in pcibridge
  • From: "John L. Bass" <jbass@dmsd.com>
• Re: [pci] Fifo instantiation in pcibridge
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [pci] Fifo instantiation in pcibridge
  • From: "Miha Dolenc" <mihad@opencores.org>
• [pci] Fifo instantiation in pcibridge
  • From: Eric Modica <emodica@pacbell.net>
• [pci] testing the core
  • From: =?GB2312?Q?=D4=F8=D1=DC?= <DARRENTJEN@yeah.net>
• [pci] GENERAL PURPOSE I/O
  • From: "darshan ramesh mehta" <darshanmehta2k@rediffmail.com>
• [pci] Bus-functional model of PCI master, written in Verilog?
  • From: dbanas@taoofdigital.com
• Re: [pci] RE: [pci] Problems compiling PCI core and test bench for Modelsim
  • From: "Miha Dolenc" <mihad@opencores.org>
• [pci] how to simulate the project
  • From: sumnow <sumnow@263.net>
• Re: [pci] RE: [pci] Problems compiling PCI core and test bench for Modelsim
  • From: jamarek@rockwellcollins.com
• [pci] CardBus compliance ?
  • From: Jaakko.Toivonen@esa.int
• [pci] RE: [pci] Problems compiling PCI core and test bench for Modelsim
  • From: sky@virgilio.it
• Re: [pci] Problems compiling PCI core and test bench for Modelsim
  • From: "Miha Dolenc" <mihad@opencores.org>
• [pci] Problems compiling PCI core and test bench for Modelsim
  • From: james a marek <jamarek@rockwellcollins.com>