[oc] Distributed Arithmetic

[Jamil Khatib <jamilkhatib75@yahoo.com>]

I put a digital filter design on the CVS under new module called
arith_cores.
can anyone help me by generating the post PPR vhdl code with the timing
and if its possible teh bitstreem for any of the Vertix devices.

The design is based on the Distributed algorithm. I am going go give
more information about it on the html pages I am preparing.
It is based on fixed multiplication constants " 1  0  0  1  for this
vesrion" and serial addition. It has 4 tabs and the word width is 8
bits.



Thanks for your help

Jamil


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