[oc] Tools and Bits [was Re: Ethernet Mac]

[Larry Doolittle <ldoolitt@recycle.lbl.gov>]

Victor the Cleaner <jonathan@canuck.com> wrote:
> I can't imagine anyone being so stupid as to name a piece of GPLed
> software the same as a commercial package already in the same field.

A1: They're French, what do you expect :-)
A2: How do you know Xilinx came first?

> Xilinx is emphatic about
> the difficulty of reverse-engineering the bitstream (they claim it's
> all but impossible), and it would severely compromise that position
> with their biggest customers if they released the bitstream generation
> algorithm.

There was a long and virulent thread about bitstreams on
comp.arch.fpga recently, I think it's finally died down.
Conclusion 1: the bitstream can, and probably has, been
reverse engineered.  Security Through Obscurity doesn't
work.  Their biggest customers are kidding themselves if
they think the bitstream is secure.

Conclusion 2: If you don't like the existing tools,
you can throw out 90% of Xilinx Alliance, and still
program chips that you placed-and-routed yourself.  There
is a pseudo-documented plain-ASCII file format called XDL
that represents the entire chip configuration, and can be
converted to NCD and from there to the bitstream using
programs in Xilinx Alliance.

My interpretation:
  If you want to get a design done _now_ (like OR1K), use
the commercial stuff.
  If you want to advance The Cause [TM], fiddle with Icarus,
Electric, the French Alliance, or whatever else you can find,
and try to connect it to the Xilinx (or Altera) back ends
using something like XNF or EDIF.  None of those programs
have anywhere near the capability of the commercial tools,
like Foundation.  My personal experience leads me to think
Icarus has promise as a Verilog synthesizer.
  At some point, once the free synthesizers (or schematic
tools) are working, some dedicated individual can crib from
(but not copy) vpr to place-and-route a chip, and generate
XDL from XNF, EDIF, or any other convenient intermediate
format the free tools want to work with.
  Finally, at least two years in the future, someone with
no fear of Intellectual Property lawyers will reverse engineer
an existing, cost-effective FPGA bitstream, and complete the
chain.  Alternately, a start-up FPGA company will glom onto
the proven useful free toolchain, and sell a chip specifically
designed and supported using it.