Re: [openrisc] just starting out

["Damjan Lampret" <lampret@opencores.org>]

Mark,

like Marko said the easiest way is to take ORP SOC (OpenRISC Reference
Platform SOC). It had all the needed peripherals already included (Simple
memory controller customized to work with Xess XSV800 board, UART16550,
Ethernet MAC 10/100). In fact this ORP SOC also has a number of SW test
cases included, and it is used also for regresion tests of the or1200.

So I'd suggest you download ORP SOC, run some simulations (scripts for
running simulations via Cadence NCsim are included). Then you implement
design for Xess XSV800 (scripts for Synplify included, pin conbstraints for
Xess XSV800) included and see how it works on Xess XSV800. At this point you
can download orpmon or uClinux to XSV800 board.

Next step to target to TSMC .18u should be simple as you will be already
familiar with the design. Just make sure whatever memory libraries you use
that are supported in or1200. Otherwise you will have to add support.

regards,
Damjan

----- Original Message -----
From: <mrmclean@cablespeed.com>
To: <openrisc@opencores.org>
Sent: Wednesday, April 02, 2003 4:07 PM
Subject: [openrisc] just starting out


> Well there is a lot of information here, but not a lot on how to get
> started using the core. My plan is to eventually target the .18um TSMC
> CMOS process, but I'd like to target a virtex part first. Is there make
> scripts or a project file somewhere? are there any samples programs
> already written - like a counter program to blink some lights? In the
> virtex part do you use block rams or sram off chip? My short term goal is
> to synthesize the core into an FPGA and verify its operation. Then I'll
> add peripherals and when the SOC is together and working properly
> target silicon. I know there are a lot questions here, but I really need
to
> get started on the right foot as soon as possible. Thanks for the help!!
>
> Mark
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