[openrisc] insn decoder and COFF loader

["Damjan Lampret" <lampret@opencores.org>]

I added binary support (binary insns decoder) and COFF loader to the
or1ksim. Also tonight I tried to make or16.h and or32.h more generic so that
some letters are not handled in a special way (like 'X' and 'Y') and I
started adding letter description and routines to handle that descriptions
(e.g. I removed length field from struct or16_opcode and instead added
insn_len function that computes this automatically from encoding). At the
moment OR32 is broken in or1ksim and OR16 binaries generated by the
assembler are a bit weird (perhaps or1ksim handling is weird). Anyway update
your local CVS repositories.

Anyway beside more generic insn description I recommend we also add support
for more generic relocations to assembler. For example should we add
description for relocations so that we can handle all relocations in the
same way (according to what relocation description would say).

Also I have a question regarding OR16 delay slots. I am not sure if I
unserstand correctly whether we want to have delay slot of variable length
or is it one insn delay slot or is it the next packet of insn(s) naturally
aligned at singleword. This is also why or1ksim is probably broken (or
perhaps assembler or gcc is broken). Anyway I feel this needs to go to or1k
arch manual as soon as possible.

regards, Damjan