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Hi,
I am trying to implement
the Ethernet MAC (from Opencores) on the FPGA. I have a question about
the ifg_timer.v that has been described in transmit
module.
In the brief description,it is said that the IFG has
two intervals time, IFG_1 for the first 60 bit times and IFG_2 for the following
36 bit times of IFG. But in the program I find:
`define IFG_LENGTH_2 (5'd22)
I'm not sure if the length is "5'd22". Why it is
"22"?
I think it ought to be "5'd24".
Perhaps I'm wrong,but I want to know the reason.
Would you tell me about it?
Thanks.
Regards,
YuZhou |