CVSROOT: /home/oc/cvs Module name: or1k Changes by: lampret 01/11/13 11:01:03 Modified files: mp3/rtl/verilog/or1200: tt.v Log message: Fixed tick timer interrupt reporting by using TTCR[IP] bit. -- To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml