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[cvs-checkins] pci/rtl/verilog wbw_wbr_fifos.v



CVSROOT:	/home/oc/cvs
Module name:	pci
Changes by:	mihad	01/10/05 10:20:12

Modified files:
	rtl/verilog    : wbw_wbr_fifos.v 

Log message:
	Updated all files with inclusion of timescale file for simulation purposes.

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