Re: [oc] PID controller in FPGA?

["niclas" <niclas@hedhman.org>]

> One thing to watch out for when implementing the integrator is windup.
> When implementing the summation, you will need a way to limit the value
> of the integrator. If you can find an adder block that will let you do
> saturation arithmetic, use it. There are other schemes out there;
> searching the web for "integrator windup" should yield some helpful
> suggestions.

The second thing "we software people" adds to the generic PID algorithm in
sampled systems (which I assume is the case here) is a Maximum Derivation
factor, i.e. how much is the D part allowed to change the output per sample,
to reduce sensitivity to noise. Then leave it to the application engineer to
apply...

Niclas

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