Re: [oc] Synthesizable T80 code problem

["MikeJ" <mikej@freeuk.com>]

you need to get xst to read the code in the correct order. These are the
project files I use (xilinx 4.3i)

file t80.prj :

T80_Pack.vhd
T80_MCode.vhd
T80_ALU.vhd
T80.vhd
T80se.vhd

file t80.scr :

run
-ifn t80.prj
-ifmt VHDL
-ofn t80.ngc
-ofmt NGC -p XCV300E-FG456-6
-opt_mode Area
-opt_level 2


----- Original Message -----
From: <jelydonut@iraqmail.com>
To: <cores@opencores.org>
Sent: Friday, February 07, 2003 6:21 PM
Subject: [oc] Synthesizable T80 code problem


> Im trying to synthesize the code in Xilinx ISE5.1i but i get three errors
> everytime i try it.
>
> ERROR:HDLParsers:3312 - C:/Xilinx/bin/z80/../../../z80/T80.vhd Line
> 245. Undefined symbol 't80_mcode'.
> ERROR:HDLParsers:3312 - C:/Xilinx/bin/z80/../../../z80/T80.vhd Line
> 310. Undefined symbol 't80_alu'.
> ERROR:HDLParsers:3312 - C:/Xilinx/bin/z80/../../../z80/T80.vhd Line
> 820. Undefined symbol 't80_reg'.
>
> I can manually synthesize everything else.. just not the top level...
>
> Anyone know what I need to do to get the code to synthesize?
>
> Also.. anyone know why half the time I try to email
> cores@opencores.org the mail gets sent but doesn't seem to be added
> to the forum..
>
> jelydonut
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