Re: [oc] Silicon Implementation

[John Sheahan <jrsheahan@optushome.com.au>]

Hi Joachim
I agree my summary was overly simplistic, and engineering is all 
about choosing the right solution for a particular problem.

Point taken with metal mask gate array - my comments related more to
the DSM performance or density driven parts of the market.

Older fabs are paid off, they should be used. There are many 
places where they are the appropriate solution. 

using an fpga to prove a design works and for initial production, 
then moving to volume in asic is unlikely to go away, depending 
also on product lifetime.
john

 
On Thu, Mar 14, 2002 at 11:40:43AM +0100, Joachim Strömbergson wrote:
> Aloha!
> 
> John Sheahan wrote:
> >Hi Ali
> >should I assume this is just a learning exercise then?
> >
> >.25 -- 0.8 micron is so old, that fpga has way passed it for performance.
> >So in small, there is now no point doing custom.
> >
> >FPGA's have a place. I don't think its fair ot assume a designer
> >should 'move away'. In fact I think the opposite is happening more and
> >more as mask sets skyrocket in price. 
> >
> >5 years ago the point to move from fpga to asic was clear. Not so much
> >now.   Unless you need either much more than 1M gates or *lots* or
> >performance, or you want to make millions of them, then custom chips
> >make little sense.
> >
> >You need expensive tools for floorplanning, placement, routing ,
> >2.5D extraction,  DRC , power integrity, NVL, etc.   Its not hobby
> >stuff.  And if you are not using them all day, you stuff up.
> >
> >Gate array (ie modifying metal only over multiple use diffusion) died
> >5 years back. Almost all asic is now standard cell, usually with cores
> >(eg reused IP).  
> 
> As an ASIC and FPGA engineer I must say that your description is somewhat 
> simplistic and in ways dead wrong. There are more ways to skin a cat, and 
> more than one reason for doing so. Let me explain:
> 
> 0.35u and even 0.5u ASIC processes are still around. They are very useful 
> for applications where even a cheap (say Spartan-something) simply will not 
> do. For a system with few pins, low memory and low power consumption. A 
> simple GA-ASIC or SC-ASIC in these processes might be the only alternative.
> 
> Also, econimically you can beat the FPGA so much that the added cost of 
> development and NRE makes it a feasible solution for quite a small number 
> of chips. Not millons but tens of thousands.
> 
> Case in point: A small 8-bit MCU + added customer functionality. 25 MHz, 
> customer specific interface. Spartan solution came to ~7 USD + external mem 
> and EEPROM (configuration + program storage). ASIC solution ~2 USD and no 
> external mem at all. The combined MC-reduction gave a break-even at ~25 
> kUnits.
> 
> So, there are both technical and econimical reasons why an ASIC might still 
> be the best/only solution.
> 
> Also, I would guess that for example NEC would be quite upset with your 
> claim that GA-ASICs are dead. They are shipping HUGE amounts of GA-ASICs, a 
> market that is also growing quite nicely btw [1]. This technology is 
> actually a very attractive middle step between FPGA and SC-ASICs. Low 
> NRE-cost. low turn around time, lots of silicon proven IP are some of the 
> benefits of the GA-ASIC technology.
> 
> We are working with several customers and for some of them, FPGAs is the 
> perfect technology, for some it's GA-ASICs and for some it's SC-ASICs. It's 
> a matter of both technical and economical requirements that simply can't be 
> answered with "ASICs is only for millions of units" and "Gate array died 5 
> years back". Also, for most customers, it's not FPGA, GA-ASIC, or SC-ASIC 
> only. Instead we look at the product roadmaps and realise that in some 
> phase the FPGA will be best, and in another an ASIC-implementation will be 
> best.
> 
> I can agree with you somewhat on the tools and hobby thing though. 
> Development tools for at least SC-ASICs are more expensive and not 
>  normally for the hobbyist. Albeit, for 0.35u and 0.25u you don't have som 
> many DSM problems which requires as much work as you implied with your 
> toollist.
> 
> In conclusion: No, ASIC-technologies are not dead, not super expensive and 
> only for a few high volume applications. No, FPGAs. and ASICs are not 
> competing but complementing technologies. No, GA-ASICs are not ded. But 
> yes, for a hobbyist, a FPGA/CPLD solution is probably the way to go.
> 
> 
> [1] You could compare this to the CPU market. ~100% of all shipped 
> processors are _not_ 32bit processors. Instead it is 4/18/16 bit 
> processors. They are not fancy. They are not powerful. They are dirt cheap 
> and everywhere.
> 
> -- 
> Med vänlig hälsning, Yours
> Joachim - Alltid i harmonisk svängning
> ----------------------------- InformAsic AB ----------------------------
>   Joachim Strömbergson, R&D-manager
>   phone: +46(0)31 - 68 54 90       Joachim.Strombergson@InformAsic.com
>   mobile: +46(0)733 - 75 97 02          http://www.InformAsic.com
> ----------------------------- InformAsic AB ----------------------------
> 
> --
> To unsubscribe from cores mailing list please visit 
> http://www.opencores.org/mailinglists.shtml
--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml