Re: [oc] Silicon Implementation

[John Sheahan <jrsheahan@optushome.com.au>]

chipexpress silicon was never what I would describe as 'real cheap'

Also there was a passivation issue that meant they were pretty much 
prototypes with very limited ife.

mask cost relates to design rules. how much performance do you need?
40k is at least one zero short of a current mask cost. 
john



On Sun, Mar 03, 2002 at 10:24:56PM -0800, Ali Mashtizadeh wrote:
> I was wondering if I could get some input on how to go about
> implementing a chip in silicon. I have considered full asic and gate
> array. I heard chip express used to have a process with no NRE and the
> chips were real cheap but they don't have it anymore. The name of the
> process started with something like Laser .... I dont remember but does
> anyone know anything like that with no NRE. I moving from FPGA's to
> asic's. This isn't for commercial use, so if anyone knows how I can
> implement a chip in an ASIC or gate array without paying 40K or up for
> the NRE that would be just wonderful.
> 
> Ali
> 
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