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Re: [oc] Again! modulo arithmetic hardware



Hi!

> I like the solution!
>
> maybe it would be easier to implement it like this:
>
> static int temp = 0;
> int random ()
> {
>   int x = rand16() + temp; //(1)
>   if (x >= 10) x -= 10;
>   if (x >= 10) x -= 10;
>   return temp = x;
> }
>
> Is this distribution still flat and random?

I've also spend some time to optimize the original method and came to the
following:

Get a random 5-bit number Rand(4..0) and a 4-bit binary counter Cnt(3..0)

if (Rand(3..0) < 10) then
    Output <= Rand;
end if;
if (Rand(3..0) > 9) and (Rand(3..0) < 15) then
    if (Rand(4) = 1) then
        Output <= Rand(3..0) - 5;
    else
        Output <= Rand(3..0) - 10;
    end if;
end if;
if (Rand(3..0) = 15) then
    Output <= Cnt;
    Cnt <= Cnt + 1;
end if;

It's the same princaple but uses only one counter and everything except for
case 15 it's pure combinational logic. I would guess it's quite efficient
and fast to implement in FPGA.

For your solution: If you add two flat-distribution random number, like you
did in row (1) (supposing you really generate a flat distribution in temp)
the result will not be flat, but will be a trapezoid distribution with it's
maximum in the interval [8..17] (if i'm rigth). However you also make
truncations which complicates the picture but it stil won't result in a flat
distribution.

Andras Tantos



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