RE: [oc] Sequential processing in VHDL? Whats the best way todo it?

["Martin.J Thompson" <Martin.J.Thompson@trw.com>]

>Martin,
>
<snip>
>
>Your code is so close to the one I did its freaky, did I leave my webcam on
>pointing at
>the screen? lol I tried it with 8 instructions (similar to FSM-8) in VHDL on
>Webpack.
>Programmed the off chip to 4MHz. then clocked this  down to 1Hz
>(std_logic(22) of counter)
>and then used this 1Hz clock for my 'process code' so I could watch the LED
>change. In one
>'instruction' block I switch the LED off and all the others turn it off.
>Simple enough but I am well f***ed if I know what Webpack compiled it as!
>The LED comes
>on for a second, goes off for a second then on again etc...  I expected LED
>on for 1 sec
>then off for 7 then on again. How the hell does Webpack screw that one up?
>

Post your code, I'll see what I can tell...

>> Webpack is not a 'real' simulator AFAIK.  Xilinx and Altera both offer
>limited versions of
>> Modelsim, but I reckon you'll reach the 500 line limit fairly quickly.
>There are some free
>> (for some senses of the word) simulators about, which I think are text
>only, but that may
>> be fine for a start off.  Esp. if you get printf's in there!
>
>Aaaaaaaaaaaah did you say 500 line limit? Forget that one then, that might
>be one printf statement!

No, you can do printing in a single line of VHDL, so long as you don;t want to synthesise it...

>If my program could say compile my own version of C down to a .RBT file to
>squirt into the FPGA
>then I will be mightily pleased alas will still need some sort of "place and
>route" software step.
>Certain aspects of FPGA programming still seem way too expensive to me, most
>notably the software!
>But not for too long. ;-))
>

You still want to use WebPack for place and route, and possibly for synthesis, just use someone else's simulator.  Free all round and the right tool for the right job.

>Just have to have words with Altera and Xilinx, whoever wishes to supply me
>and my development
>partners with proper development software and a budget board will be the
>ones we develop the
>code for. The 'loser' company can just wait for our program to support their
>devices. I'm sure
>that after spending $25,000 on software licences for the current programs it
>doesn't leave a lot
>of money for buying loads of development boards 

Well, except that if you're spending $25K on SW, a couple of grand here and there for software is nothing.  Also, bear in mind that Celoxica claim some incredible cost-savings by using a C-flow rather than straight to VHDL, so you could potentially save $25K on a single big project...

unlike when the software is
>free leaving $25,000
>for development boards and other things. Also when my software is released
>into the world lots of
>C programmers are suddenly going to be able to code directly into hardware.

Nah, they'll still need to learn about hardware :-)

>If only 5% of all the
>world's C programmers in the world needed to buy a FPGA development board
>how many would that be?
>Note to self, buy loads and loads of shares in whichever company gives me
>development tools.
>

Xilinx and Altera both support educational programs, so you might be able to persuade them of your good intentions...

>You in Solihull? I've been there at one time, can't remember why though.
>Maybe on assignment or for an
>interview. Could have even been a pub-crawl hence the haze.
>

Yep, that's us - are you from around these parts?

Cheers,
Martin


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