Re: [oc] opencores status

[Damjan Lampret <lampret@opencores.org>]

Dear S.J. Lee,

OR1001 (VHDL) is obsolete. I am working on OR1320 (Verilog). I hope it will be
available soon to general public.

regards,
Damjan

> Dear Lampret,
> 
> This is S.J. Lee.  I am studying your OR1001 VHDL code.  I found that in
> your document of native bus of or1001, irqn[1-0] are input ports.  But in
> your VHDL code, you declare IRQN[1-0] as output ports from OR1001 CPU.  Is
> there any special reason to do that?  It has also indicated that you have a
> FPGA board for OR1K.  Is this FPGA synthesized by using your OR1K VHDL code?
> In your VHDL code, does OR1K accept any IO interrupt?  What is the status of
> your OR1K FPGA, is it functional?
> 
> Looking forward to hearing your reply.
> 
> Best Regards,
> S.J.
> 
>