Re: [openrisc] Unimplemented features in OR1200 Debug Unit

[Marko Mlinar <markom@opencores.org>]

On Wednesday 13 August 2003 19:39, Anders Nordstrom wrote:
> Hi,
>
> Is anyone working on the or1200_du.v? I have been running Verilog
> simulations and I noticed that the dbg_is_o output from the OR1200 never
> changed. I looked at the Verilog code and it turns out that several
> features that are documented in the OpenRISC 1200 IP Core Specification are
> not implemented in the RTL code. For example; bit 1 of dbg_is_o is tied to
> zero and bits [2:0] of dbg_lss_o are also tied to zero.
> How can you successfully run gdb if the debug unit is not fully
> implemented? Are the missing pieces not used?


Hi!

AFAIK nobody is working on the or1200 debug right now. or1k (in the doc) 
defines architecture. Its up to each implementation to support what it is 
needed. gdb is using only software breakpoints (l.trap) to break or1200, but 
gdb also has support for hardware breakpoints.

Marko


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