Re: [oc] C to VHDL parser/converter

[Vic <vikrantps@yahoo.com>]

Nice information Martin and Gunnar.

Vic.
Canada
--- Gunnar Dahlgren <gunnar.dahlgren@axis.com> wrote:
> Hi,
> 
> I think Imec in Belgium (www.imec.be) is working on
> something related.
> Their approach is to add a C++ library and rules
> which defines a way to
> write code that can both be compiled as usual, and
> translated to a
> hardware implementation (if I remember it correctly,
> I heard about it
> some years ago). It's called Ocapi.
> 
> Regards
> Gunnar Dahlgren
> ASIC designer @ Axis Communications AB, Sweden
> 
> At 17:13 2003-08-19 +0200, veena_20k@yahoo.com
> wrote:
> >Hi,
> >
> >Does anyone have a C to VHDL translator that can be
> used?  I need to 
> >convert my C code  to VHDL as a part of my thesis
> work. Please let me 
> >know if you can help.
> >
> >Thanks.
> >-veena
> >*************************************************
> > Navigation: All forums > Cores > Message List >
> Message  Post  
> >Message 
> >
> >From: "Martin.J Thompson" <Martin.J.Thompson@t... >
> >Date: Mon, 10 Dec 2001 03:49:58 -0500
> >Subject: Re: [oc] Handel-C replacement, replacement
> name first 
> >methinks!
> >
> >>Martin,
> >>
> >>Windows? YUK, I've finally found a use for MS
> Windows CDs, they make 
> >good
> >>tea coasters. Too many bugs in MS code for my
> liking.
> >>
> >:-)
> >
> >>My primary thinking is to do a little program that
> can parse a C program 
> >and
> >>translate it straight into VHDL so people could
> then fine-tune it as
> >>necessary if they wish. I'm still a VHDL newbie
> but if I would like to 
> >code
> >>a Linux style mini-kernel in an FPGA (CPU+Linux
> Kernel in a ASIC?),
> >>ambitious yes but if they can do a TCP/IP stack
> with the DK1 suite 
> >then I'm
> >>sure I can go one better. I've looked at all their
> manuals and can see 
> >some
> >>major areas for improvement in their software (not
> just the name!). 
> >What I
> >>would love to see though is some VHDL code
> generated by one of their 
> >example
> >>C programs to see how they think the VHDL side
> should be done. I'm 
> >already
> >>using a very basic C to VHDL program which seems
> to be working quite 
> >well.
> >>Have a look at my "Sequential processing in FPGAs"
> post which includes 
> >a
> >>sample of its output and let me know what you
> think. VHDL is still a
> >>minefield of new learning for me so any help in
> this area will be much
> >>appreciated.
> >>
> >
> >Sounds very ambitious - I'd start by flashing some
> lights :-) I have to 
> >say the Celoxica's video demos are *very*
> impressive, generating VGA 
> >real-time from C impresses the pants off most
> softies, so a demo board 
> >with a RAMDAC on would be nice...
> >
> >They generate directly to EDIF normally, although
> they do have a VHDL 
> >output flow now. YOu might get some info from some
> of the papers 
> >written about Handel-C when it was still an
> academic thing.
> >
> >See my other reply on sequential processing...
> >
> >>Although if Celoxica want to buy the program off
> me rather than let me 
> >make
> >>it shareware then you won't just have my gratitude
> for helping you'll 
> >also
> >>receive a financial reward too. Their website says
> they have $30 million 
> >in
> >>venture capital so I can always dream. rotflmbo
> >>
> >
> >You never know... Of course, if you open the
> source, Celoxica can nick 
> >your ideas, even without nicking the source-code
> can't they?
> >
> >>Paul McFeeters
> >>
> >>Handel-C is copyright of Celoxica, Buffy-C hmmm
> might be copyright of 
> >me ;-)
> >>
> >
> >I've never objected to Handel-C actually :-) You
> maybe want to find 
> >something completely different... or not as you
> like!
> >
> >Cheers,
> >Martin
> >
> >
> >>-----Original Message-----
> >>From: owner-cores@o... [mailto:owner-cores@o...
> ]On 
> >>Behalf Of Martin.J Thompson
> >>Sent: 07 December 2001 11:39
> >>To: cores@o... 
> >>Subject: Re: [oc] Has anybody won the lottery?
> >>
> >>
> >>Hi Paul,
> >>Sounds like a good challenge! I'm interested in
> this, but don;t have a 
> >huge
> >>amount of time at the moment. Let me know how it
> goes - I'm 
> >experienced in
> >>FPGA deisgn via VHDL, and I've written some
> software in my time also 
> >(C,
> >>perl and a bit of python amongst others).
> >>
> >>Would you be targetting windoze or some unixy OS?
> Or aiming for
> >>portability?
> >>
> >>Cheers,
> >>Martin
> >>
> >
> > 
> >--
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> >
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