RE: [oc] pseudo random generator verilog code source

[Victor Snesarev <vnsnes@yahoo.com>]

http://vnsnes.freeshell.org/lfsr/index.html

Not sure how an 's' made it in front of 'html' in the
link at the bottom of the message.

-Victor

--- Renaux Jacky <renaux.jacky@wanadoo.fr> wrote:
> Hi
> Victor could you resend your URL , the one
> you
> pointed out is not recongnized
> 
> thanks
> 
>                     //\\\\\
>                      |~ ~ |
>  Jacky ..          (  O O  )
>   ___________oOOo_____( )_____oOOo__
>  |
>  |        Jacky RENAUX
>  | email : renaux.jacky@wanadoo.fr
>  | web   :
> http://perso.wanadoo.fr/jacky.renaux
>  | tel   : (33) 06 86 90 65 83
>  |                    Oooo
>  |____________oooO___(    )______
>              (    )  (    /
>               \   )   )  /
>                \  (   (_/
>                 \_)
> 
> 
> -----Message d'origine-----
> De : owner-cores@opencores.org
> [mailto:owner-cores@opencores.org]De la
> part de ni_zhihong@sina.com
> Envoyé : mercredi 13 août 2003 0356
> À : vnsnes@yahoo.com; cores@opencores.org
> Objet : Re: [oc] pseudo random generator
> verilog code source
> 
> 
> 
> 
> ----- Original Message -----
> From: Victor Snesarev <vnsnes@y... >
> To: cores@o...
> Date: Thu, 19 Sep 2002 12:14:25 -0700 (PDT)
> Subject: Re: [oc] pseudo random generator
> verilog code source
> 
> >
> >
> > I wrote up a webpage about using LSFRs
> (Linear Shift
> > Feedback Registers) for pseudo-random
> number
> > generation during time off work, maybe it
> will help:
> >
> >
> http://vnsnes.freeshell.org/lfsr/index.shtm
> l
> >
> > A link to an old Altera LFSR core is at
> the bottom of
> > the page.
> >
> > Hope this helps.
> >
> > --- olupas@o...  wrote:
> > > Hi all,
> > >
> > > This will generate only one new bit per
> clock.
> > > Maybe you need 32 new bits per clock,
> to send
> > > over a network ...
> > >
> > > A good starting point might be AN49
> from Altera.
> > >
> > > I was unable to find this on the web,
> so I have
> > > built my owns,
> > > starting from there.
> > >
> > > Unfortunately,  I cannot send the
> sources
> > > but I can help you with hints.
> > >
> > > Cheers,
> > > Ovidiu Lupas.
> > >
> > >
> > >
> > > ----- Original Message -----
> > > From: Marko Mlinar <markom@o... >
> > > To: cores@o...
> > > Date: Thu, 19 Sep 2002 10:55:46 +0200
> > > Subject: Re: [oc] pseudo random
> generator verilog
> > > code source
> > >
> > > >
> > > >
> > > > Here:
> > > >
> > > > reg [31:0] poly;
> > > >
> > > > always @(posedge clk or posedge
> reset_poly)
> > > >   if (reset_poly) poly <= #1
> 32'hdeaddead;
> > > >   else poly <= #1 {poly[30:0],
> poly[17] ^
> > > poly[4]};
> > > >
> > > > On Thursday 19 September 2002 09:54,
> Dharmeshbhai
> > > PATEL wrote:
> > > > > Hi list,
> > > > >
> > > > > Does any one has an idea where i
> can get the
> > > verilog code
> > > > source
> > > > > for a pseudo random generator
> (number or signal)
> > > ?
> > > > >
> > > > > Please let me know.
> > > > >
> > > > > Thanks in advance.
> > > > > D.PATEL
> > > > >
> > > > >
> > > > >
> > >
> >
> ___________________________________________
> __________________
> 
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> > > >
> http://www.ifrance.com/_reloc/mail.exclusif
> > > >
> > >
> >
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