RE: [fpu] FPU operations

["Rudolf Usselmann" <russelmann@hotmail.com>]

----- 2 Message Combo !!!! -----

>From: owner-fpu@opencores.org [mailto:owner-fpu@opencores.org]On Behalf
>Of Damjan Lampret
>
....
>
>Sure. No problem here. I just hope fadd can take less than fmul. ;-)
>Anyway forget it. You know what I mean. To have FPU as fastest as
>possible.

Well, I thought it might be simpler if we would stretch the basic FP
OPs to take all equal amount of time. So if fadd only needs 2 cycles
and fmul 4, we might want to stretch fadd to 4 as well, so that all
are equal length (all FIXED to 4). But this is really your call, since
you are the OR1K man !!!

>It can only know if all instructions have fixed number of clk cycles to
>execution. CPU can't know how many cycles it will take for fadd if once
>operands are zeros and in the second case if operands are 1.234. If
>execution doesn't depends what operands are then CPU knows how many clk
>cycles it takes for a particular insn. Of course insns have different
>number of clk cycles.

No, No, No !  I don't know how this came about, but I have never meant
to suggest that the execution time depends on the input OPERANDS. I
always meant to say the the different FPU blocks (fadd, fsub, fmul,
fdiv...) might have unequal (but fixed) execution time. So for example:
- FADD/FSUB will always take 3 cycles (FIXED) (example only)
- FMUL/FDIV will always take 6 cycles (FIXED) (example only)
etc., etc.

...
>--damjan

>From: owner-fpu@opencores.org [mailto:owner-fpu@opencores.org]On Behalf
>Of Damjan Lampret
>
>Result vs zero. Is it greater, lesser or equal (actually LT(GT) and EQ
>are enough to always know GT(LT)).

No, that is not quite correct. If one operand is a NAN or INF, it is
undetermined.

To compare against zero, should be easy, I could see how this would be
very fast. Lets document this somewhere and implement it ...
I'm thinking this would be a second comparator that would look at the
intermediate result.

>Oh, I thought FPU would latch results. OK, so FPU only registers them
>(I mean on clk edge) and CPU latches them. This is also fine.

No, then the FPU would need to know about timing. I think it's simpler
if the CPU handles all of that.

>--damjan


Cheers !
rudi

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