Re: [fpu] FPU operations

[Damjan Lampret <damjanlampret@yahoo.com>]

Trust me. Exceptions are detected only by the CPU core (FPU doesn't
know anything about exceptions). What FPU must signal is a cause for
exception. So what I need from the FPU is a signal that represents
particular cause for exception. This signal is for example OVERFLOW.
Another is DIVIDE_BY_ZERO. Basically status bits that are generated
together with the result of operation. CPU then takes appropriate
actions to execute proper exception handler. So FPU doesn't even need
to have their own CPU "visible" registers.

--damjan

--- Jamil Khatib <jamilkhatib75@yahoo.com> wrote:
> 
> --- Damjan Lampret <damjanlampret@yahoo.com> wrote:
> > 
> > > operations, but what about all status and control
> > > registers? I'll put all of them internallay in the
> > FPU
> > > but we need to define a method to access them
> > > 
> > 
> > Signals representing status bits should be
> > registered outputs of FPU.
> > It is up to FPU's boss (OR1K for example) to check
> > and act accordingly
> > (generate exceptions if necessary etc.). OR1K has
> > its own instructions
> > to operate over special purpose registers.
> > 
> > --damjan
> > 
> I am not sure if this is going to work, The exceptions
> should be generated from the FPU (interrupt) and all
> other registers, unless you want to provide a signal
> interface for each exception, mask , compare.....
> 
> 
> Regards
> Jamil Khatib
> 
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