RE: [pci] Implemented optional pci pins & PCI Core Success Stories

["Radwin Zagala" <rzagala@softhome.net>]

Thanks Miha!

Another question, is it difficult adding these optional
signals(interface control and miscellaneous) to your pci core?

Regards,
Radwin

> -----Original Message-----
> From: owner-pci@opencores.org 
> [mailto:owner-pci@opencores.org] On Behalf Of Miha Dolenc
> Sent: Monday, May 05, 2003 5:47 PM
> To: pci@opencores.org
> Subject: Re: [pci] Implemented optional pci pins & PCI Core 
> Success Stories
> 
> 
> Hi!
> 
> Radwin, you are right - the optional signals mentioned in the 
> specification are not implemented.
> 
> To answer the question about the core usage:
> - as far as I know one ASIC has been taped out till now with 
> the PCI bridge in it. I'm still waiting to hear about the results.
> - I know about a few designers using the core in FPGA designs 
> - they should tell you more about their experience with the core.
> 
> Regards,
> Miha Dolenc
> 
> ----- Original Message -----
> From: "Radwin Zagala" <rzagala@softhome.net>
> To: <pci@opencores.org>
> Sent: Monday, May 05, 2003 10:46 AM
> Subject: [pci] Implemented optional pci pins
> 
> 
> > Good day to everyone!
> >
> > I have read in the PCI Specification document that there are 
> > implemented optional pci interface pins such as pme# and 
> clkrun# but 
> > the pci bridge code doesn't have these. Are they 
> implemented or I have 
> > the wrong copy of the source code?
> >
> > Thanks for any help!
> >
> > Regards,
> > Radwin
> >
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