[pci] ncelab -MESSAGES

[pinhas.krengel@formalized.com]

Hi
Can somebody that uses cadence ncverilog use the the option -MESSAGES for elaboration and put the Design hierarchy summary on borard.

The option gives a report like this:
       Design hierarchy summary:
                         Instances  Unique
                Modules:         3       2
                Registers:       4       3
                Scalar wires:    4       -
                Always blocks:   2       1
                Initial blocks:  2       2


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Best Regards,

Pinhas Krengel
Sr. ASIC / FPGA Engineer
Formalized Design Alliance Partner
011 972-9-894-7865 Home Office
011 972-54-679-119 Portable
480-545-4555 Jim McHood, VP Engineering
www.formalized.com

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