[pci] Re: PCI Verification

[Oliver Amft <oam@oamx.net>]

Ovidiu, thanks for the simulation files. I will walk through them and
try to develop some ideas regarding the testing. Maybe we can discuss
the testbench design afterwards. IMO it would be a good idea if we can
commit the project to one HDL (but I am not sure about this). Miha and
Tadej are using Verilog. I am quite new to Verilog. Are you using the
NCSim too (for Verilog designs)? The Alliance Suite supports only VHDL,
right?
Progress is very low at the moment, I am trying to set up some stuff
too.
Cheers,
Oliver