Re: [fpu] your fmul: norm_mul.v file

[Rudolf Usselmann <rudi@asics.ws>]

on 9/6/00 3:14, Sagheer.Ahmad@infineon.com at Sagheer.Ahmad@infineon.com
wrote:

> Hi Rudi,
> 
> I am sorry, i don't have any significant or perceptible contribution in fpu.
> Nevertheless,
> I, sometimes, do read your emails. I was just looking at your norm_mul.v file
> (downloaded
> from cvs)......I can't imagine why do you need such a big mux.
> Let us see the following example.
> if you multiply two 4 bit binary numbers, their MSB being always '1' (in ur
> case it is 24 bits)
> the result will always be within the following two limites.
> 1) 1000*1000 =  1000000
> 2) 1111*1111 = 11100001
> In fact in general, result would be (2n-1) or 2n bits, if the numbers are n
> bit each and
> MSB being '1'.
> So if i say that you only need  a very small mux to normalize .. would that be
> wrong?

Sagheer, you are right for normalized numbers. If you do want to be able to
handle de-normalized numbers, I believe you do need a larger mux (actually a
large shift register). Further, I'm trying now to share the post-normalizer
and rounding logic between the different functional units.

Again, sorry, the code that is checked in is out of date and is missing many
things. Soon I will publish the updated code.

>
.... 
> 
> Sagheer Ahmad.

rudi