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[fpu] fdiv
hi all,
I attached to teh email teh fdiv core it is not yet
ready there are some bugs and things to be covered but
I want your comments on teh code since it is my first
verilog code.
Could you please let me know what the interfaces of
the other cores so as to make it compatible with them.
Regards
Jamil Khatib
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fdiv.v