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RE: [fpu] FPU operations
>From: owner-fpu@opencores.org [mailto:owner-fpu@opencores.org]On Behalf
>Of Damjan Lampret
>
>
> > > Hmm, this is interesting, so what should happen if a compare
> > instruction
> > has a SNAN as an input ? Do we assert the SNAN exception, or do we
> > remain
> > quiet ?
> >
>
>Well isn't what is stored in the FP register file always only NAN?
>Anyway Parhmi's book says this:
>
>--
>It is somewhat less clear what the results of comparisions such as NAN
>!= NAN (true) and NAN <= +INF (false) should be. The general rule is
>that NAN is considered unordered ith everything, including itself. Thus
>comparisons with NAN produce "invalid operation" exception.
>--
I'm still uncertain if this is really what we want. When you are doing
CMP, you are trying to determine the value. You not necessarily want
an exception to occur. Think of it as such: You are trying to implement
an complex math function in software. Perhaps an reserved FP instruction
that is not implemented traps (unimplemented instruction) and the software
tries to emulate it. You want to deal with all possible situations in your
code. You try to avoid generating a second level trap, and then perhaps
a third level trap. At some point you will die.
Does this make sense ? Can you see my point ?
....
>
>For more complete description, refer to the IEEE standard.
Yes, the standard has a lot of stuff in it ...
>I hope you have information about Guard, Round and Sticky bits. They
>are very helpful when doing rounding and detecting properly rounded
>result (and generate exception if it isn't). I can quote from the book
>if required.
Yes, I'm working on this. Unfortunately (or actually fortunately for me ;*)
I was asked to teach a verilog course at a local university (KMIT/NECTEC in
Bangkok), so I have to prepare for that as well.
>Rudi, did you get answer to your question about comparing with (S)NAN.
> >From what I have read it looks comparing to NAN always generates
>exception. Right?
No, see above ..
>--damjan
rudi
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