RE: [fpu] fmul performance

["Rudolf Usselmann" <russelmann@hotmail.com>]

>From: owner-fpu@opencores.org [mailto:owner-fpu@opencores.org]On Behalf
>Of Damjan Lampret
>
>[cut]
> > Anyhow if that is so simple why do large companies do
> > not go to higher precisions when they have enough
> > resources if they want to keep on the same performance
> > > Regards
> > Jamil Khatib
> >

I think this thread originated because someone wanted to have the
floating point cores parameterized.

Lets take a look at it a bit closer. Yes, the storage format from
single to double precision is just adding a few bit. That part could
be parameterized. However, there are other areas, that might not be
that trivial. Normalization and adjustment of exponents, comes to mind.

I'm sure it could be done, but I wonder what do we gain ? I will
take a closer look at the cores I'm writing to see if there is an
easy way to do it. If it's possible, I'll do it, if it's to difficult,
I won't.

>I think because:
>1.) More precision -> more resources -> more expensive chip (you know
>how competitive market is today !)
>2.) More precision -> slower design -> ...

The real problem is that your adders become very slow. My guess is you
would have to double the size of your pipeline to get double precision
to work at the same speed as single precision.

>3.) Most ordinary customers need only single precision anyway (rocket
>scientists are not ordinary customers IMO ;-)
>
>But of course I might be wrong and it is not so simple to scale to
>double precision just by modifying vector size. Anyone?

I think for the first version, single precision is ok, later you can
change to double. Remember you also need compare functions for floating
point numbers. Is anyone writing those ?

>regards,
>Damjan

rudi

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