Re: [openrisc] Question) Address transfer between IMMU & ICache

["Damjan Lampret" <lampret@opencores.org>]

Jim,

sorry for delay I was travelling.

I'll look at the data you have provided and let you know what is the
problem. It happened in the past that people have been doing strange things
with their configuration of the processor (the defines) or there were
external problems (how th processor was integrated into the rest of the
system and how interacted with the rest of the system) or instantiated RAMs
that didn't model the same as those that were tested and are known to work
etc. Anyway I don't see a problem to figure out what is the problem, just
need some time to go over the data you have sent me.

regards,
Damjan

----- Original Message -----
From: "Jim Tong" <jtong@richcore.com>
To: <openrisc@opencores.org>
Sent: Wednesday, May 21, 2003 8:12 PM
Subject: Re: [openrisc] Question) Address transfer between IMMU & ICache


> Damjan:
>    We are using the latest version. The problem shows
> up very quickly when we run interrupt driven programs.
> The basic problem is Icache controller used an old
> address even when CPU switched to a new address.
>
> Jim
>
> --- Damjan Lampret <lampret@opencores.org> wrote:
> > Hi !
> >
> > I'd like to know more so in case there is a problem
> > it can be fixed.
> >
> > Obviously I have not seen this problem before and if
> > it would most of the
> > more complex software wouldn't work as jumps are
> > pretty common ;-)
> >
> > Also I doubt that uClinux would work with such very
> > basic bug. uClinux makes
> > many exceptions.
> >
> > regards,
> > Damjan
> >
> > PS Make sure you don't use an old version. Verify
> > your source files againt
> > the one in the cvs. Or better, take the latest from
> > the CVS.
> >
> > ----- Original Message -----
> > From: "Jim Tong" <jtong@richcore.com>
> > To: <openrisc@opencores.org>
> > Sent: Tuesday, May 20, 2003 10:42 PM
> > Subject: Re: [openrisc] Question) Address transfer
> > between IMMU & ICache
> >
> >
> > > Sungyon:
> > >    I saw many similar problems. When jump or
> > exception
> > > happened, the Icache returned the old data. My
> > > recommendation is to design your own cache
> > controller.
> > >
> > > Jim
> > >
> > > --- SUNGYON@aaww.com wrote:
> > > > Dear Lampret & members,
> > > >
> > > > I'm doing MP3 RTL simulation in or1k/mp3
> > directory.
> > > > It seems that The MP3 draft is concuded with
> > ICache
> > > > disabled.
> > > > I enabled the ICache, and run the minimad but
> > this
> > > > failed.
> > > >
> > > > Through the waveform analysis, on the occurrence
> > of
> > > > address jump,
> > > > I found that the communication between IMMU &
> > ICache
> > > > seems to have a
> > > > problem.
> > > >
> > > > For example, for 4k ICache & IMMU disabled
> > > > on the jump from 8000-8758 to 8000-a708
> > > > Since IMMU provides 8000-8708 (which is
> > {previous
> > > > tag range(8000-8),
> > > > current index(708 of 8000-a708)}) to ICache,
> > > > The Icache decides hits with 8000-8708 and the
> > > > 8000-8708 is executed
> > > > really. It's wrong.
> > > > The executed.log shows that 8000-a708 is
> > executed
> > > > with instruction of
> > > > 8000-8708.
> > > > For summary, IMMU does not be prividing right
> > > > address to ICache.
> > > >
> > > > I think it's difficult to talk about this
> > problem in
> > > > detail, since we are
> > > > not in one desk.
> > > > But If anyone haves any helpful idea about this,
> > > > give me.
> > > > Thank you in ahead.
> > > >
> > > > Regards, Sungyon in South Korea.
> > > >
> > > >
> > > >
> > > > --
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