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Re: [openrisc] eCos & gcc bug

To: openrisc@opencores.org
Subject: Re: [openrisc] eCos & gcc bug
From: Scott Furman <sfurman@rosum.com>
Date: Fri, 18 Apr 2003 12:32:07 -0700
In-Reply-To: <078a01c3062a$cde2ece0$ef01ed0a@flextronics.si>
References: <20030417100417.GF29636@vortex.si.ring> <3EA008F2.30909@rosum.com> <078a01c3062a$cde2ece0$ef01ed0a@flextronics.si>
Reply-To: openrisc@opencores.org
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Damjan Lampret wrote:

>Scott,
>
>did you have any problems linking data/bss to 'h00xxxxxx and code to
>'hf0xxxxxx?
>
>I tried once and it didn't work.
>  
>
That's what is done in eCos.  It should be straightforward because gcc 
generates full 32-bit addresses to access data/bss.   What was more 
tricky was getting immediate jumps to work between code in ROM and RAM 
becauseof the limited size of the immediate field.  Maybe that's what 
you're thinking of ?

-Scott


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References:
- [openrisc] eCos & gcc bug
  - From: phoenix <phoenix@opencores.org>
- Re: [openrisc] eCos & gcc bug
  - From: Scott Furman <sfurman@rosum.com>
- Re: [openrisc] eCos & gcc bug
  - From: "Damjan Lampret" <lampret@opencores.org>

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