[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [openrisc] Interrupt servicing
Heya !
If we take maskable interrupts as those coming from peripherals, then
you can use PICMR to mask an interrupt. You get the same effect as if
you clear the PICSR and what is good, it is easier to implement (in fact
it is already implemented). When you want to "see" interrupts from the
same peripherl, just enable that particular interrupt in PICMR and any
waiting interrupt from this peripheral will become "active".
regards,
Damjan
----- Original Message -----
From: Carlos =?iso-8859-15?q?S=E1nchez=20de=20La=20Lama?=
<csanchez@t... >
To: openrisc@o...
Date: Mon, 23 Dec 2002 18:43:25 +0100
Subject: [openrisc] Interrupt servicing
>
>
> Hallo!
>
> I've a question about the Programmable Interrupt Controller. As
> described in
> the Architecture Manual, the interrupt line to the CPU rises
> whenever an
> unmasked interrupt line to the PIC comes up, and it remains on
> active state
> until the actual device drops it. The PICSR is like a mirror of the
> PIC
> interrupt input lines.
>
> I'm not really sure, but wouldn't it be better if the interrupt
> could be
> cleared just writting to the PICSR? A very slow device could need a
> long time
> to be accessed, and with current implementation during that time
> there would
> be no way of clearing a interrupt caused by such device. If we
> could write a
> "0" to the correspoding bit in PICSR to make the line go low,
> interrupt
> processing wouldn't be blocked so long. I don't know whether it has
> any wrong
> effects...
>
> It's only an idea, tell me what you think (this is *really* a
> Request For
> Comments ;-) ).
>
> Merry Christmas!
>
> Carlos
>
--
To unsubscribe from openrisc mailing list please visit http://www.opencores.org/mailinglists.shtml