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Re: [openrisc] Re: OR1000 16 bit instruction set

To: openrisc@opencores.org, Andreas Bombe <bombe@informatik.tu-muenchen.de>
Subject: Re: [openrisc] Re: OR1000 16 bit instruction set
From: Shane Nay <shane@minirl.com>
Date: Mon, 25 Feb 2002 17:35:23 -0800
In-Reply-To: <20020225154734.GA9072@informatik.tu-muenchen.de>
References: <1013712864.6475.11.camel@asic1.lowrance.com> <009101c1baa6$60c4eb20$4901010a@tyr> <20020225154734.GA9072@informatik.tu-muenchen.de>
Reply-To: openrisc@opencores.org
Sender: owner-openrisc@opencores.org


> > But it is really a pain to use 16 and 32 bit ISA together...
>
> With respect to hardware implementation, I guess?

No, with respect to the linker and interupt vectors primarily.  Since 
the 16 and 32bit instructions are represented by "modes", and you 
have to switch the processor between modes to execute the different 
types of instructions.

Thanks,
Shane Nay.
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References:
- [openrisc] OR1000 16 bit instruction set
  - From: Jeff Hanoch <jeff@lowrance.com>
- Re: [openrisc] Re: OR1000 16 bit instruction set
  - From: "Marko Mlinar" <markom@opencores.org>
- [openrisc] Re: OR1000 16 bit instruction set
  - From: Andreas Bombe <bombe@informatik.tu-muenchen.de>

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