[openrisc] if you finish exams.

[jimmy87@sunplus.com.tw]

Hi Damjan,
If you finish exams, I think all of us had better discuss OR32 and OR16
instructions
again.
I feel our insns are not power enough.

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In order to defeat some existed CPU, I think we had better had single insn
which support push insns and pop insns from stack. The mechanism
is used to reduce code density, power and increase performance in embedded
usage. Only those insns may not be enough. Of course, our best advantage
is that our ISA is free.
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OR1601 RTL is ready. Assembler is also ready.
But GCC is not yet ready.
Anyone who wants  the whole package/document
could send me one email, or download it after Damjan helps me upload it.

Best regards, Jimmy