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[cvs-checkins] oc8051/sim/rtl_sim/run make_verilog run_sim.scr

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] oc8051/sim/rtl_sim/run make_verilog run_sim.scr
From: OpenCores CVS Agent <cvs@www.opencores.org>
Date: Wed, 2 Apr 2003 15:18:50 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	oc8051
Changes by:	simont	03/04/02 15:18:49

Modified files:
	sim/rtl_sim/run: make_verilog run_sim.scr 

Log message:
	generic_dpram used

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