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[cvs-checkins] or1k/or1200/rtl/verilog or1200_immu_tlb.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] or1k/or1200/rtl/verilog or1200_immu_tlb.v
From: OpenCores CVS Agent <cvs@www.lampret.com>
Date: Mon, 28 Oct 2002 15:34:35 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	or1k
Changes by:	mohor	02/10/28 15:34:35

Modified files:
	or1200/rtl/verilog: or1200_immu_tlb.v 

Log message:
	RAMs wrong connected to the BIST scan chain.

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