CVSROOT: /home/oc/cvs Module name: pci Changes by: mihad 02/10/21 12:04:34 Modified files: bench/verilog : pci_testbench_defines.v system.v rtl/verilog : pci_bridge32.v Log message: Changed BIST signal names etc.. -- To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml