[cvs-checkins] oc8051/sim/rtl_sim/src/verilog oc8051_rom.v

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	oc8051
Changes by:	simont	02/08/20 18:04:12

Modified files:
	sim/rtl_sim/src/verilog: oc8051_rom.v 

Log message:
	combinatorial loop removed
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