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[cvs-checkins] pci/rtl/verilog async_reset_flop.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] pci/rtl/verilog async_reset_flop.v
From: OpenCores CVS Agent <cvs-checkins-agent@opencores.org>
Date: Wed, 14 Aug 2002 15:44:21 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	pci
Changes by:	mihad	02/08/14 15:44:21

Modified files:
	rtl/verilog    : async_reset_flop.v 

Log message:
	Include statement was enclosed in synosys translate off/on directive - repaired
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