[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[cvs-checkins] uart16550/rtl/verilog uart_regs.v



CVSROOT:	/home/oc/cvs
Module name:	uart16550
Changes by:	mohor	01/12/27 14:24:13

Modified files:
	rtl/verilog    : uart_regs.v 

Log message:
	lsr[7] was not showing overrun errors.

--
To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml