Re: [oc] I2C core in slave mode

[Richard Herveille <richard@asics.ws>]

It is developed as a master interface. First as a single master only, but with 
multi-master and slave operation in the back of my mind.
After a couple of changes multi-master mode was only a couple of lines of code 
away, so now it is multi-master capable.

Slave operation requires some additional logic, among others to detect 'my 
slave address'. Also when in slave mode, it shouldn't be possible to generate 
start and stop conditions. For the rest, operation should be equal.

Somebody (probably me) should add it sometime, but for now it is not 
slave-mode capable.

The biggest problem isn't coding the lines, that should be done in, say 
2-4weeks (full-time), but verifying the entire core again.

Richard


> I used the I2C core in a project.  My strong impression was that the
> core had a couple of small hooks built into it to enable slave
> operation, but it was not "slave ready".  It would take a lot of work
> to adapt it for slave operation -- maybe 1 or 2 weeks of full-time
> attention.
>
> Of course, I am not the original designer, so it would be interesting
> to hear his opinion.
>
> Stuart
>
> > Is it possible to use the I2C master core in slave mode? I ve read the
> > documentation but I can not work out how to do it. If not possible, does
> > anybody know of a I2C slave core?
> >
> > Thanks
> >
> > Andoni


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