Re: [oc] Verilog Books

[Joachim Strömbergson<Joachim.Strombergson@InformAsic.com>]

Aoha!

Ho, Wen Jei x4297 wrote:
> Verilog dominate in U.S.
> VHDL dominate in Europe.
> This is fact, not war ;-)

Short correction: Verilog dominates in all over the world with the exception 
of Europe. And Verilog is pretty strong in som areas (market and 
geographically ) here too.

For me as an engineer, the important thing is that the developers of the EDA 
tools (which is being done in the US) are more used to Verilog. Therefore, the 
Verilog tools are generally more stable and have less bugs. At the same time, 
new tools, versions and features are are available first for Verilog. The 
reason for this is that the US is the most important EDA market and therefore 
the focus from the EDA-companies is on making good tools for Verilog.

So, without comparing the technical merits of the languages, I tend to use 
Verilog simply because it lessens the (always present) risk of having problems 
in the toolchain.

Given the choice, and on technical merits of the language itself, I would go 
with Superlog/System Verilog. ;-)

-- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
VP, Research & Development
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