Re: [oc] C to HDL? Didn't realise the situation was that bad

[jdalton@bigfoot.com.au]

> Well, I disagree with this a little.  HDLs like VHDL and Verilog are in a
> way 'special' languages, they were designed mostly to describe hardware
> (hence the name :).

I stand by my original comments.  They are not special. 
A hardware desciption is a bunch of sequential processes
running in parallel.

>   An FPGA is not an architecture like a normal cpu,

I don't think FPGAs and CPUs are that far apart.  One way
of looking at an FPGA is as a massively parallel CPU where
the instruction set corresponds to the leaf cells in the
macro library ('or ax,bx' is not so different to 'c <= a or b').
Agree routing is difficult, but again it is not so far
removed from register allocation.  It's sort of like a CPU
where each ALU cannot address the entire memory space.
(ie. not every logic block can be routed directly to every other
logic block).

> I'm going to guess that
> your big problem is that most of the HDL/FPGA tools are designed more for
> hardware people,

No.  I have spent the last decade designing with HDLs.  I like to think
of myself as quite a competent 'hardware person'.  My big problem
is that as digital design gets higher level, and my understanding
improves, I increasingly have the view that us 'hardware people'
are reinventing the wheel.  Much of the wheel exists and it is free.

Best wishes
John

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