Re: [oc] Video controller core

[greenworm@icansay.com]

Hi, Jeff,
     I am working on MCU now,of which the DDC is one of features. But I 
can't find the data sheet on DDC. Would you mind help me with it. 
Thanks a lot.


 

----- Original Message ----- 
From: Jeff Garzik <jgarzik@m... > 
To: cores@o...  
Date: Mon, 28 Feb 2000 20:23:01 -0500 
Subject: [oc] Video controller core 

> 
> 
> Just read some of the messages about building a video controller 
> core. 
> 
> I have done some work on the other side of the aisle... writing 
> Linux 
> kernel video device drivers. 
> 
> Here are some ideas about video cores: 
> 
> For ultra-low-cost embedded, CGA is the best choice. 
> 
> If compatibility is a concern at all, though, it is much smarter to 
> develop a VGA core.  VGA is pretty much universally supported. 
> 
> But if you want to develop a GOOD video core....... 
> 
> * Lives on a PCI or AGP bridge 
> 
> * All 32-bit registers, 100% memory-mapped I/O (MMIO) 
> 
> * Registers can optionally live in a DMA command buffer.  This is a 
> ring 
> buffer of register reads and writes, which the video chip processes 
> asynchronously. 
> 
> * NO VGA compatibility.  NO text mode.  These can be emulated in 
> BIOS or 
> other software. 
> 
> * Integrated *DRAM controller, as the video chip must keep tight 
> control 
> over both video clocks and memory clocks 
> 
> * Standard set of 2D accels:  fills, blits (fb/DMA mem -> fb/DMA 
> mem 
> copy), etc. 
> 
> * VESA features like DDC, power management 
> 
> If someone is ambitious, this design can extended to support 3D --- 
> without changing any of the chip features/logic above.  In most 3D 
> chip 
> designs, 3D is seamlessly layered on top of 2D, and is very cheap 
> to add 
> to the design. 
> 
> 
> 
> -- 
> Jeff Garzik              | "Are you the police?" 
> Building 1024            | 
> MandrakeSoft, Inc.       | "No ma'am.  We're musicians." 
> 
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