Hi Allan, I am looking Faster parallel CRC calculator. my intention of increaseing internal data width to 128bit is to reduse the speed of internal fpga. I am operating External interface is 160MHz, but internal processing is at 80MHz.in this way i am getting advantage. Thanks & Rgds..... -Naveena -- To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml