Re: [oc] I2C: help with ack timing

[Richard Herveille <richard@asics.ws>]

Ok everyone,

Here's the problem. There's a problem with the I2C core concerning read-ack 
timing. The interrupt signal and the TIP signal are asserted resp. negated 
to early (before the ACK bit has been read). This is a known bug caused by 
the cmd-ack (command acknowledge) signal being generated to early. But I 
don't have the time at the moment to fix it. Please be patient (or try to 
fix it yourself and send the fix back to CVS or me).

Richard

>Hello,
>
>I have downloaded and am currently simulating
>the I2C core.  I am not using the wishbone
>interface because it is not applicable to my needs
>and have created my own state machine to
>control the core.
>
>I am having trouble with acknowledge timing and
>getting the correct data and ack values out of
>the core.
>
>If there is anyone out there who has experience
>with using this core, I would like to discuss the
>problem with them.
>
>By the way, what is the preferred protocol for
>core specific discussions like this.  Should they
>be done on the list or by direct e-mail?  I didn't
>see an I2C specific list.
>
>Thanks,
>
>Tom
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