Re: [oc] ATA core

[Richard Herveille <richard@asics.ws>]

You can get it via opencores CVS.
Using the opencores CVSweb/CVSget is probably the most easy. Use ATA as 
module name. This will download all available cores (vhdl & verilog).

Richard

>  How can I get a vhdl IDE core?
>
>----- Original Message -----
>From: richard at asics dot ws
>To: cores at opencores dot org
>Date: Thu, 12 Apr 2001 22:11:47 +0200
>Subject: [oc] ATA core
>
> > Hi guys,
> >
> > New versions of the OCIDEC (OpenCores IDE Controller)
> > cores and of the
> > preliminary datasheet are available.
> >
> > issues:
> > 1) removed records.vhd + removed all references to the
> > records.vhd library
> > Some VHDL to Verilog translation tools don't know how to
> > handle records, so
> > I removed all record usage
> > 2) fixed a bug where all cores didn't respond to the
> > IDE-enable bit
> > 3) changed the DMA_req signal generation in the OCIDEC-3
> > core, to reflect
> > the latest version of the OpenCores DMA engine.
> > 4) Changed the preliminary datasheet to reflect the above
> > issues.
> >
> > Richard
> >
>--
>To unsubscribe from cores mailing list please visit 
>http://www.opencores.org/mailinglists.shtml

--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml