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[oc] Some code to be OpenCores



Hi!

My name is Andras Tantos. I'm a Hungarian electric engineer, currently
working in Copenhagen. I've recently started two projects with
OpenCores in mind. Now they are hopefully mature enough to go to the
public.

One is a monitor controller core. This core is capable of driving
(after signal-level adjustment) Hercules, CGA, EGA, VGA monitors. It
supports up-to 8-bit/pixel color depth and no capable of running
~60MHz pixel-clock in an Altera 1k30 device. The core is Wishbone
compatible.

The other is a toolkit initiative for Wishbone core designs. It should
contain things like bus arbiters, simple peripherials, memories,
FIFOs, bus resizers, bridges etc. All the useful stuff often needed
when doing SoC. Currently it contains four simple cores and a huge
wish-list.

You can find the details on my web-page:
http://andras_tantos.tripod.com/work/freecores/index.htm
Criticism is welcome.

If you provide me the details I would like to put the stuff under
OpenCores.

Andras Tantos