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[oc] Project Name: Synchronous-DRAM Controller

To: cores@opencores.org
Subject: [oc] Project Name: Synchronous-DRAM Controller
From: "Jean-Francois.Biziere + etude.meea" <biziere@iuplo.univ-ubs.fr>
Date: Thu, 30 Mar 2000 09:31:23 +0200
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Hello,

I am fourth years student in electronic engineering.
I am in training period. I am in charge to design a nano-automate. In this
application I need a SDRAM so I need a SDRAM Controller too.
I am extremely interested in your product and I would like to get as soon as
possible more information.
Example: Is it possible to have the Synchronous-DRAM Controller in VHDL model?
Is it available now? and what is its cost (perhaps free)?

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