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To
:
cores@opencores.org
From
: "Bhattacharya, Uttam" <
Uttam.Bhattacharya@latticesemi.com
>
Date
: Thu, 16 Mar 2000 12:23:54 -0800
Reply-To
:
cores@opencores.org
Sender
:
owner-cores@opencores.org
I will appreciate if you can send me the VERILOG/VHDL source code for me. With regards -Uttam
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