Project Name: WISHBONE DMA/Bridge IP Core

(See change Log at bottom of page for changes/updates)


This is a simple DMA/Bridge IP core. It has two WISHBONE interface. It can perform DMA transfers between the two interfaces or on the same interfaces.

Some of the main features are:

Please see the spec for more details !



To get a tared and gziped snapshot from CVS click here, or go to the CVS info page.

The Specification is available here: dma_doc.pdf (about 230K)


Author / Maintainer

I have been doing ASIC design, verification and synthesis for over 15 years. I hope you find this cores useful. Please send me a note if you intend to use it  !

Rudolf Usselmann

Feel free to send me comments, suggestions and bug reports.

Change Log