Project Name: nnARM

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1.Purpose of this project

This project has two primary purposes:

FIRST: To develop a synthesizable embedded processor soft core.

SECOND: To give the project members experience in organizing a free hardware development team over the internet. The GNU and Linux successes have proven that this development mode is successful for software, we want to prove it is also suitable for hardware development.

2.What help do we want?

Currently, this is a very small team. There is only one main developer, and one documentation person. We can not imagine that such a small team can manage to create this entire system without additional design and testing help. So any kind of help is welcomed. If you are interest in this, please contact

First, this team is particularly weak in the design of cache and memory controllers, so we are eager for help in this field.

Second,Help to test the core, both in the simulator or on an actual FPGA board.

Third, help to port uclinux or ECOS to nnARM

3.What it can do and can not do now

Currently, this core can fully support ARMv4T ISA

it does not support MMU and cache, so it can not run a OS that require Virtual memory

4.Books used as reference works:

1.Books on architecture

Computer Architecture : A Quantitative Approach by John Hennessy, David Patterson(January 1996).

2.Books on RTL design and synthesis

HDL chip design by Douglas J Smith

5.Tools in use on the project:

1. simulation tools

VCS verilog simulator from workview office

Verilog-XL simulator from cadence

ModelSim Xilinx Edition

2.RTL synthesis tools

Quartus II from Altera

Aurora from workview office

Design Compiler from synopsys

3.ARM development tools

ARM SDT 2.5 from ARM

GCC for ARM.